1. Field of the Invention
This invention relates to techniques for recovering timing information from a pseudo-ternary waveform and, more particularly, to a novel combination of discrete circuits with an integrated circuit used therefor.
2. Description of the Prior Art
The extensive use of centralized computers for data processing and the rapid growth in the use of pulse code modulation systems for the transmission of voice frequency information have created requirements for the transmission of large volumes of digital informatiom over available communication channels, such as telephone lines. While conventional binary transmission techniques may be, and have been, used in low-speed applications, multi-level systems, including the duobinary, modified duobinary, quaternary and higher level systems, are finding increasing use because of their high-speed capabilities. The modified duobinary data transmission system is described in U.S. Pat. No. 3,457,510.
In the transmission of information by digital signals, a series of time-divided equal intervals, called time slots, are employed. In such digital transmission systems, the applied signals are discrete in both time and amplitude, with the time duration of each signal element confined to one time slot. To recover the transmitted information, the received signal must be sampled in each time slot so as to determine the character of the signal element in each time slot. Because of degradation which occurs during transmission, the received signal is normally equalized to compensate for the most serious transmission path distortions of the signal and is amplified to attain an amplitude more nearly like that of the original signal. What is then required is a clock timing signal which permits sampling of each time slot at or near the optimum sampling time so that the discrete amplitudes originally transmitted may be reconstituted.
For binary, bipolar and the baseband duobinary signals, as well as for other digital signals of this type, acceptable timing signals may be obtained from the equalized and amplified received signal by nonlinear processing (rectification and clipping), which introduces a discrete component at the signaling rate. This is followed by a frequency selection circuit which may be a high Q narrow-band bandpass filter tuned to the timing frequency to extract the desired sinusoidal timing component of the input signal. This sinusoidal timing component is then amplified and limited to produce an approximate square wave at the signaling rate. Generally, the output is then applied to a pulse generator which generates narrow sampling pulses at a particular edge of the square wave. Phase shift correction is often necessary, and a phase shifter may be employed in the timing path to adjust the phase of the timing pulse so that the sample pulses occur at the proper location in each time slot. A brief discussion of timing recovery is included at pages 656 - 657 of the text "Transmission Systems For Communications", revised fourth edition, December 1971, Bell Telephone Laboratories, Inc.
A technique for producing a timing signal from a modified duobinary digital signal is disclosed in U.S. Pat. No. 3,707,683. It was noted therein the simple rectification technique disclosed hereinabove did not work well for the modified duobinary signals because of the intersymbol interference and phase structure, which caused the resultant timing signal to vanish. To overcome this problem, the technique disclosed employed a plurality of full-wave rectifiers. This was necessary to obtain a discrete component at the timing frequency from the modified duobinary signal prior to filtering. In a copending application, entitled "Apparatus and Method for Timing Recovery from a Pseudo-Ternary Signal", filed Feb. 17, 1977, Ser. No. 769,827, a technique of timing recovery is disclosed in which the incoming signal is sliced at a predetermined amplitude and only the upper-level portion is used for deriving the clock timing signal.